The structures and method disclosed herein relate to semiconductor devices (e.g., bipolar devices, such as bipolar junction transistors (BJTs) or heterojunction bipolar transistors (HBTs)) and a method of forming such devices that includes forming a monocrystalline semiconductor layer (e.g., a monocrystalline extrinsic base layer) over isolation region(s).
As discussed in U.S. Pat. No. 6,972,443 issued on Dec. 6, 2005 to Khater, assigned to International Business Machines Corporation and incorporated herein by reference, it is desirable in bipolar devices, such as bipolar junction transistors (BJTs) and, particularly, in high performance heterojunction bipolar transistors (HBTs), to have a relatively high transit frequency fT and maximum oscillation frequency fmax. fmax is a function of fT as well as various parasitic resistances and capacitances including, but are not limited to, parasitic base resistance Rb and parasitic collector-to-base capacitance Ccb. Reduction of the parasitic resistances and capacitances can result in a higher fmax. Thus, it would be advantageous to provide an improved bipolar device, such as a bipolar junction transistor (BJT) or heterojunction bipolar transistor (HBT), with both reduced base resistance Rb and reduced collector-to-base capacitance Ccb and a method of forming such an improved bipolar device.